We're growing more accustomed to the idea of talking to our devices, thanks to the success of products like Amazon Echo and Google Home, not to mention Apple's Siri voice assistant. Researchers at the Massachusetts Institute of Technology see the trend of talking to tech continuing, which inspired them to create a low-powered chip designed specifically for automatic speech recognition.
The engineers believe the new chip could mean power savings of 90 to 99 percent compared to a typical cellphone from today running speech recognition software. An iPhone running Siri might require about one watt of power, for example, whereas the low-power chip could do the same work for .2 to 10 milliwatts depending on the breadth of vocabulary it is required to recognize.
Beyond our personal mobile and wearable devices, low-power chips could be essential for adding speech recognition capabilities to numerous sensors and other power-constrained devices that make up the rapidly growing "internet of things." Such devices may go for long periods of time between being recharged, or they may harvest energy from their environment, making efficient use of power key to their operation.
"Speech input will become a natural interface for many wearable applications and intelligent devices," says Anantha Chandrakasan, Professor of Electrical Engineering and Computer Science at MIT, whose group developed the new chip. "The miniaturization of these devices will require a different interface than touch or keyboard. It will be critical to embed the speech functionality locally to save system energy consumption compared to performing this operation in the cloud."
The new chip conserves energy by employing a few key strategies. The first is a relatively simple "voice activity detection" circuit that monitors ambient noise to determine if sounds in its environment constitute speech or not. Only when it recognizes actual speech will it then fire up the large, more complicated and energy-draining speech recognition circuit.
The second strategy involves compressing data and also evaluating only a short section of audio in its onboard memory at once to keep power requirements low.
"For the next generation of mobile and wearable devices, it is crucial to enable speech recognition at ultralow power consumption," reiterates Marian Verhelst, a professor of microelectronics at the Catholic University of Leuven in Belgium who also works on more efficient devices and sensors. "This is because there is a clear trend toward smaller-form-factor devices ... Speech offers a very natural way to interface with such devices."
Chandrakasan and his team presented a paper describing the new chip at the Solid-State Circuits Society conference this month.
Source: MIT