Electronics

New IBM chip technology integrates electrical and optical devices on the same piece of silicon

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IBM Scientists (L to R) Yurii Vlasov, William Green and Solomon Assefa have unveiled a new chip technology that enables computer chips to communicate using pulses of light
IBM Scientists (L to R) Yurii Vlasov, William Green and Solomon Assefa have unveiled a new chip technology that enables computer chips to communicate using pulses of light
IBM's CMOS Integrated Silicon Nanophotonics technology integrates electrical and optical devices on the same piece of silicon

IBM has announced another breakthrough in its long term research goal to harness the low power consumption and incredible speed promised by optical computing. Following on from the Germanium Avalanche Photodetector – a component able to receive optical information signals at 40 Gb/sec and multiply them tenfold using a mere 1.5V supply – the company has now unveiled a new chip technology that integrates electrical and optical devices on the same piece of silicon. So how far can this technology take us? Eventually, IBM hopes, all way to the Exascale – that's one million trillion calculations per second.

IBM says the new technology, called CMOS (Complementary Metal-Oxide Semiconductor) Integrated Silicon Nanophotonics, will revolutionize the way chips communicate and enable an improvement of over 10 times the integration density than is feasible with current manufacturing techniques by integrating optical devices and functions onto a silicon chip. This is possible because IBM’s new technology sees a single transceiver channel with all accompanying optical and electrical circuitry occupying only 0.5mm2, which is ten times smaller than previous efforts. This means it should be possible to manufacture single-chip transceivers as small as 4x4mm2 that can receive and transmit over a trillion bits (Terabit) per second.

IBM's CMOS Integrated Silicon Nanophotonics technology integrates electrical and optical devices on the same piece of silicon

Standard CMOS foundry manufacture

In addition to combining electrical and optical devices on a single chip, IBM says its new technology can be produced on the front-end of a standard CMOS manufacturing line without the need for any new or special tooling. This approach allows silicon transistors to share the same silicon layer with silicon nanophotonics devices and, to make this approach possible, IBM researchers have developed a suite of integrated ultra-compact active and passive silicon nanophotonics devices that are scaled down to the diffraction limit – the smallest size that dielectric optics can afford.IBM says single-chip optical communications transceivers can now be manufactured in a standard CMOS foundry, rather than assembled from multiple parts made with expensive compound semiconductor technology. This is made possible through the addition of a few more processing modules to a standard CMOS fabrication flow and enables a variety of silicon nanophotonics components, such as: modulators, germanium photodetectors and ultra-compact wavelength-division multiplexers, to be integrated with high-performance analog and digital CMOS circuitry.

Shooting for an Exaflop

By dramatically increasing the speed and performance between chips, IBM expects the new technology to further its ambitious Exascale computing program, which is aimed at developing a supercomputer that can perform one million trillion calculations – or an Exaflop – in a single second. Such a supercomputer would be around one thousand times faster than the fastest machine existing today.“The development of the Silicon Nanophotonics technology brings the vision of on-chip optical interconnections much closer to reality,” said Dr. T.C. Chen, vice president, Science and Technology, IBM Research. “With optical communications embedded into the processor chips, the prospect of building power-efficient computer systems with performance at the Exaflop level is one step closer to reality.”

The details of IBM’s research effort were presented at the major international semiconductor industry conference SEMICON held in Tokyo on the December 1, 2010.

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1 comment
Akemai Olivia
As long as this chip consumes less than 100w of power (