High performance transistors created on flexible plastic sheets

High performance transistors created on flexible plastic sheets
Researchers have claimed a breakthrough nanoimprint lithography manufacturing method that creates very high-performance transistors on rolls of flexible common plastic
Researchers have claimed a breakthrough nanoimprint lithography manufacturing method that creates very high-performance transistors on rolls of flexible common plastic
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Researchers have claimed a breakthrough nanoimprint lithography manufacturing method that creates very high-performance transistors on rolls of flexible common plastic
Researchers have claimed a breakthrough nanoimprint lithography manufacturing method that creates very high-performance transistors on rolls of flexible common plastic
The various layers of a typical MOSFET
The various layers of a typical MOSFET

Using a technique known as nanoimprint lithography, researchers at the University of Wisconsin-Madison (UW Madison) and partners have created a breakthrough method to allow the simple manufacture of inexpensive, high-performance, wireless-capable, flexible Metal Oxide Semiconductor Field Effect Transistors (MOSFET) that overcome many of the operation problems encountered in devices manufactured using standard techniques. Created on large rolls of pliable plastic, these MOSFETs could be used to make a host of devices ranging from wearable electronics to bendable sensors.

MOSFETs are semiconductor components that have rapidly replaced common bipolar transistors in electronic circuits due to their low current requirements, high-frequency capabilities, and generally improved performance. These semiconductors operate by modulating what is known as a charge concentration via internal capacitance along channels between its electrodes to produce current flow.

In other words, by applying a voltage to one electrode (known as the "gate"), an electric field is created in the substrate located between the two other electrodes (known as the "source" and "drain"), which causes a channel to open up for electron flow between them. Modulating the voltage applied to the gate electrode then has the effect of increasing or decreasing current flow, and so can be used for amplification in a circuit.

However, substantially reducing the size of MOSFETs to meet the demand for ever-shrinking integrated circuits has met with problems. Specifically, the ability of MOSFETs to produce current flow efficiently, because standard semiconductor manufacturing techniques tend not to be able to control the level of doping (the introduction of impurities in silicon designed to render it either positively or negatively charged) accurately enough to ensure consistent channel performance across individual components.

Ordinarily, MOSFETs are produced by growing a layer of silicon dioxide (SiO2) on top of a silicon substrate and then depositing a layer of metal or polycrystalline silicon over that. However, this method can be relatively imprecise and difficult to fully control, so the doping can sometimes leak into areas it isn't wanted in to create what has been dubbed the "short channel" effect.

(The short channel effect is, in essence, where etched channels on a MOSFET that allow the conduction of electricity via a field effect are reduced in size in relation to the depletion layer – or insulation area – as a result of dopant leakage, thereby decreasing performance. If the problem does not render the component defective in production process testing, then this can result in individual MOSFETs being released to market with varying performance characteristics.)

This is where the new technique developed by UW Madison and its partner universities around the US comes in.

To improve the quality of semiconductors by reducing the likelihood of this dopant leakage, the researchers employed a process of electron-beam lithography (a technique first mooted for commercial use in semiconductor production by Fujitsu and Advantest a decade ago where a process of scanning a focused beam of electrons is used to etch custom shapes on a surface covered with an electron-sensitive film known as a "resist"). This was then followed by molding and subsequent etching to produce a much more physically-controlled production process.

In detail, the team began by coating a surface with a positively doped layer of silicon, 270 nm thick. Nanoscale trenches were then produced in the device layer using electron-beam lithography, followed by dry etching to create a silicon nanomembrane. The researchers then removed the silicon nanomembrane layer and transferred this onto another substrate consisting of adhesive coated plastic (polyethylene terephthalate "PET") film. The final fabrication steps then involved adding additional dry etching to isolate and define the channel region and deposit the gate dielectric layers and metal gate.

While this may sound like a lot of work, it is in fact a relatively straightforward process and arguably less complex than some doping and deposition based techniques used in ordinary semiconductor manufacture today. The benefit of such controlled, precise, and minuscule engineering in this case, though, results in a semiconductor endowed with a unique, three-dimensional current-flow pattern which means that it consumes far less energy and runs much more efficiently than standard versions of these semiconductors.

In fact, the new transistors have been reported to operate at a record speed of 38 gigahertz, with simulations showing that they may even be capable of operating at a lightning-fast 110 gigahertz with just a little tweaking.

But speed hasn't been achieved by compromising size; the new method has provided a way of cutting much narrower trenches than conventional fabrication processes are able to do, so it may be possible to jam more of these transistors into smaller devices than ever before achieved.

The researchers also claim that the new transistor is eminently suitable to radio frequency applications, as it is designed to transmit data or transfer power wirelessly. This ability could prove particularly useful in applications ranging from wearable electronics to sensors.

Flexible semiconductors may not be a new concept by any means, with wearable electronics and flexible membranes the products of recent research, but the researchers say that this alternative, low-cost process to produce such high-performance semiconductors is particularly groundbreaking. Especially as they believe it could be easily scaled-up for use in roll-to-roll processing of plastic sheets that would enable semiconductor manufacturers to endlessly replicate the etching patterns and mass-produce many hundreds of thousands of devices on a single roll of flexible plastic.

"Nanoimprint lithography addresses future applications for flexible electronics," said Zhenqiang (Jack) Ma, the Lynn H. Matthias Professor in Engineering at UW Madison. "We don't want to make them the way the semiconductor industry does now. Our step, which is most critical for roll-to-roll printing, is ready."

Conducted in collaboration with the University of Michigan, the University of Texas and the University of California, Berkeley, details of this research were recently published in the journal Scientific Reports.

Source: UW Madison

I am curious as to the heat output of this, and the limits of cooling that can be applied.
Same as foiled. How high is "high performance"? Anyway that's promising