Researchers at Purdue University have reported important progress in developing finFETs, a type of transistor that some say will eventually substitute the silicon-based kind because it allows engineers to push miniaturization even further in the perpetual effort to validate the predictions of Moore's Law.
We've come a long way since relays and vacuum tubes were used to manipulate digital information, but the quest for miniaturization is far from being over. The transistors embedded in today's integrated circuits are generally characterized by the length of their most prominent part, the "gate", with the latest generation reaching 45 nanometers. Pushing beyond this limit, however, is no easy task.
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The main problem with producing smaller transistors is that, as gate lengths are made smaller, the silicon dioxide (SiO2) that is used as an electrical insulator in standard transistors is not sufficient, leading to an electrical leakage that compromises the functionality of the device. A potential solution is to replace silicon dioxide with materials that have a higher insulating value ("high-k dielectrics") such as hafnium dioxide (HfO2) or aluminum oxide (Al2O3).
But leakage can also be prevented by slightly modifying the design of the transistor. The introduction of a finlike structure makes things easier to manage because it can be completely surrounded with the insulator — whereas MOSFETs, today's transistors, have the insulator on one side only. In addition to making smaller transistors possible, the transistors following this design — dubbed finFETs — can conduct electrons at least five times faster.
Researchers at Purdue University created finFETs that incorporate a indium-gallium-arsenide fin with a high-k insulator, and were the first to create finFETs using an industry-standard technology called atomic layer deposition, a process that, once perfected, could make it possible to create finFET transistors using insulating layers just one atom thick.
The team's work is funded by the National Science Foundation and the Semiconductor Research Consortium.View gallery - 2 images